Modeling and Design of Highly EMI Immune CMOS OpAmp Topologies

This paper gives a review of the modeling and design of CMOS Miller operational amplifier (OpAmp) and folded cascode (FC) operational amplifier that has high immunity to electromagnetic interference (EMI). The highly EMI immune CMOS Miller OpAmps and folded cascode OpAmps have distinctive features, such as low output offset voltage and moderate power when compared to the classical Miller OpAmp and the classical folded cascode OpAmp presented in the literature. The EMI immune CMOS OpAmps take advantage of the replica concept combined with the source-buffered technique in order to achieve high EMI immunity across a wide range of frequencies (1 MHz to 1 GHz). The highly EMI immune CMOS OpAmps are designed using the first-order quadratic mathematical model. The modeling equations for the output offset current are derived and validated for CMOS OpAmps, taking into account both the body effect and channel length modulation. The circuits has been fabricated/designed using 0.18 μm mixed-mode CMOS technology. The performance result shows that the maximum EMI-induced output offset voltage for these CMOS OpAmps are less than 7 mV over an extensive frequency range from 1 MHz to 1 GHz, which is approximately 97 % lower when compared to the traditional CMOS OpAmps.