A 120 GHz <i>g_m </i>-boosting Low-Noise Amplifier in 40-nm CMOS

This brief presents the design of a 120 GHz <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$g_{m}$ </tex-math></inline-formula>-boosting low-noise amplifier (LNA) in 40-nm CMOS. The proposed LNA consists of a single-stage differential <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$g_{m}$ </tex-math></inline-formula>-boosting common-gate (CG) amplifier and a four-stage differential capacitance-neutralized common-source amplifier. A triple-coupled transformer-based <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$g_{m}$ </tex-math></inline-formula>-booting technique in the CG stage enhances gain and noise figure (NF) performances. Implemented in 40 nm CMOS, the proposed LNA achieves a measured power gain of 23.8 dB at 123 GHz with a 3-dB bandwidth of 10 GHz. The lowest NF is 5.0 dB at 123 GHz and the NF is below 6.5 dB from 114 to 128 GHz. The LNA consumes 26 mW from a 1-V supply, with a core chip area of 0.25 mm <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\times 0$ </tex-math></inline-formula>.70 mm.