In-Circuit Self-Test (ICST) of Power MOS Transistors: Measuring Gate Charge as an Indicator of Oxide Stress and Device Reliability

The gate charge required to turn on a MOS transistor is closely related to oxide damage and can therefore be used as an indicator of device reliability and aging over the lifetime of power electronic systems. This paper proposes a novel approach to measure the turn-on gate charge that does not require the drain/source terminals to be disconnected from the high-current path. Such an approach, therefore, can be applied to MOSFETs operating under real conditions. The idea is experimentally validated for a half-bridge inverter case study and the in-circuit results are consistent with those obtained for the isolated MOSFETs. Although at a preliminary stage, this work shows that In-Circuit Self-Test (ICST) is a promising methodology for reliability assessment and predictive maintenance of power electronic systems.

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Published
2024-10-16
DOI
https://doi.org/10.1109/isse63315.2024.10741096
Citations
1
Primary Topic
Integrated Circuits and Semiconductor Failure Analysis
Type
article
Field-Weighted Citation Impact
0.21

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article

In-Circuit Self-Test (ICST) of Power MOS Transistors: Measuring Gate Charge as an Indicator of Oxide Stress and Device Reliability

Valentina Palazzi, Giulia Orecchini, Anil Kumar Behera, Federico Alimenti et al.
1 citations
Integrated Circuits and Semiconductor Failure Analysis
0.21
article

In-Circuit Self-Test (ICST) of Power MOS Transistors: Measuring Gate Charge as an Indicator of Oxide Stress and Device Reliability

Valentina Palazzi, Giulia Orecchini, Anil Kumar Behera, Federico Alimenti, Michael Benegiamo, Luca Moriconi
article en
1 citations

Abstract

The gate charge required to turn on a MOS transistor is closely related to oxide damage and can therefore be used as an indicator of device reliability and aging over the lifetime of power electronic systems. This paper proposes a novel approach to measure the turn-on gate charge that does not require the drain/source terminals to be disconnected from the high-current path. Such an approach, therefore, can be applied to MOSFETs operating under real conditions. The idea is experimentally validated for a half-bridge inverter case study and the in-circuit results are consistent with those obtained for the isolated MOSFETs. Although at a preliminary stage, this work shows that In-Circuit Self-Test (ICST) is a promising methodology for reliability assessment and predictive maintenance of power electronic systems.

University of Perugia (IT)
European Commission, HORIZON EUROPE Framework Programme
Affordable and clean energy
Openalex Percentile: Top 46%
Integrated Circuits and Semiconductor Failure Analysis
0.21
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