PARS: A Pattern-Aware Spatial Data Prefetcher Supporting Multiple Region Sizes

Hardware data prefetching is a well-studied technique to bridge the processor-memory performance gap. Bit-pattern-based prefetchers are one of the most promising spatial data prefetchers that achieve substantial performance gains. In bit-pattern-based prefetchers, the region size is a crucial parameter, which denotes the memory size that can be recorded by a pattern or prefetched by a prediction. However, existing bit-pattern-based prefetchers only support one fixed region size. Our experiment shows that the fixed region size cannot meet the requirements for numerous applications and leads to suboptimal performance and high hardware overhead. In this article, we propose PARS, a pattern-aware spatial data prefetcher supporting multiple region sizes. The key idea of PARS is that it supports multiple region sizes, enabling it to simultaneously enhance application performance while reducing the hardware overhead. Moreover, PARS supports dynamically switching appropriate region sizes for different patterns through an adaptive RS-switching mechanism. We evaluated PARS on numerous workloads and results show that PARS provides an average performance improvement of 40.6% over a baseline with no data prefetchers and outperforms the two state-of-the-art prefetchers Bingo by 2.1% (up to 24.4%) and Pythia by 3.9% (up to 111.2%) in the single-core system. In the four-core system, PARS outperforms Bingo by 5.0% (up to 66.0%) and Pythia by 5.4% (up to 177.9%).

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Publication Details

Journal
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Published
2024-11-01
DOI
https://doi.org/10.1109/tcad.2024.3442981
Citations
2
Primary Topic
Data Management and Algorithms
Type
article
Field-Weighted Citation Impact
0.70

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article

PARS: A Pattern-Aware Spatial Data Prefetcher Supporting Multiple Region Sizes

Zonghui Wang, Yiquan Chen, Jiahao He, Wenhai Lin et al.
2 citations
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Data Management and Algorithms
0.70
article

PARS: A Pattern-Aware Spatial Data Prefetcher Supporting Multiple Region Sizes

Zonghui Wang, Yiquan Chen, Jiahao He, Wenhai Lin, Jiexiong Xu, Yu‐Zhong Zhang, Zhen Jin, Jingchang Qin, Wenzhi Chen, Yiquan Lin, Shishun Cai
article en
2 citations

Abstract

Hardware data prefetching is a well-studied technique to bridge the processor-memory performance gap. Bit-pattern-based prefetchers are one of the most promising spatial data prefetchers that achieve substantial performance gains. In bit-pattern-based prefetchers, the region size is a crucial parameter, which denotes the memory size that can be recorded by a pattern or prefetched by a prediction. However, existing bit-pattern-based prefetchers only support one fixed region size. Our experiment shows that the fixed region size cannot meet the requirements for numerous applications and leads to suboptimal performance and high hardware overhead. In this article, we propose PARS, a pattern-aware spatial data prefetcher supporting multiple region sizes. The key idea of PARS is that it supports multiple region sizes, enabling it to simultaneously enhance application performance while reducing the hardware overhead. Moreover, PARS supports dynamically switching appropriate region sizes for different patterns through an adaptive RS-switching mechanism. We evaluated PARS on numerous workloads and results show that PARS provides an average performance improvement of 40.6% over a baseline with no data prefetchers and outperforms the two state-of-the-art prefetchers Bingo by 2.1% (up to 24.4%) and Pythia by 3.9% (up to 111.2%) in the single-core system. In the four-core system, PARS outperforms Bingo by 5.0% (up to 66.0%) and Pythia by 5.4% (up to 177.9%).

IEEE Transactions on Computer-Aided Design of Integrated Circuits and SystemsVol. 43(11)
Zhejiang University of Science and Technology (CN), Alibaba Group (China) (CN)
National Natural Science Foundation of China
Openalex Percentile: Top 30%
Data Management and Algorithms
0.70
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