NeRF-PIM: PIM Hardware-Software Co-Design of Neural Rendering Networks

Neural radiance field (NeRF) has emerged as a state-of-the-art technique, offering unprecedented realism in rendering. Despite its advancements, the adoption of NeRF is constrained by high computational cost, leading to slow rendering speed. Voxel-based optimization of NeRF addresses this by reducing the computational cost, but it introduces substantial memory overheads. To address this problem, we propose NeRF-PIM, a hardware-software co-design approach. In order to address the problem of the memory accesses to the large model (of the voxel grid) with poor locality and low compute density, we propose exploiting processing-in-memory (PIM) together with PIM-aware software optimizations in terms of the data layout, redundancy removal, and computation reuse. Our PIM hardware aims to accelerate the trilinear interpolation and dot product operations. Specifically, to address the low utilization of internal bandwidth due to the random accesses to the voxels, we propose a data layout that judiciously exploits the characteristics of the interpolation operation on the voxel grid, which helps remove bank conflicts in voxel accesses and also improves the efficiency of PIM command issue by exploiting the all-bank mode in the existing PIM device. As PIM-aware software optimizations, we also propose occupancy-grid-aware pruning and one-voxel two-sampling (1V2S) methods, which contribute to compute the efficiency improvement (by avoiding the redundant computation on the empty space) and memory traffic reduction (by reusing the per-voxel dot product results). We conduct experiments using an actual baseline HBM-PIM device. Our NeRF-PIM demonstrates a speedup of 7.4 and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$5.0\times $ </tex-math></inline-formula> compared to the baseline on the two datasets, Synthetic-NeRF and Tanks and Temples, respectively.

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Journal
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Published
2024-11-01
DOI
https://doi.org/10.1109/tcad.2024.3443712
Citations
1
Primary Topic
Advanced MEMS and NEMS Technologies
Type
article
Field-Weighted Citation Impact
0.21
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article

NeRF-PIM: PIM Hardware-Software Co-Design of Neural Rendering Networks

Sungjoo Yoo, J.K. Heo
1 citations
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Advanced MEMS and NEMS Technologies
0.21
article

NeRF-PIM: PIM Hardware-Software Co-Design of Neural Rendering Networks

Sungjoo Yoo, J.K. Heo
article en
1 citations

Abstract

Neural radiance field (NeRF) has emerged as a state-of-the-art technique, offering unprecedented realism in rendering. Despite its advancements, the adoption of NeRF is constrained by high computational cost, leading to slow rendering speed. Voxel-based optimization of NeRF addresses this by reducing the computational cost, but it introduces substantial memory overheads. To address this problem, we propose NeRF-PIM, a hardware-software co-design approach. In order to address the problem of the memory accesses to the large model (of the voxel grid) with poor locality and low compute density, we propose exploiting processing-in-memory (PIM) together with PIM-aware software optimizations in terms of the data layout, redundancy removal, and computation reuse. Our PIM hardware aims to accelerate the trilinear interpolation and dot product operations. Specifically, to address the low utilization of internal bandwidth due to the random accesses to the voxels, we propose a data layout that judiciously exploits the characteristics of the interpolation operation on the voxel grid, which helps remove bank conflicts in voxel accesses and also improves the efficiency of PIM command issue by exploiting the all-bank mode in the existing PIM device. As PIM-aware software optimizations, we also propose occupancy-grid-aware pruning and one-voxel two-sampling (1V2S) methods, which contribute to compute the efficiency improvement (by avoiding the redundant computation on the empty space) and memory traffic reduction (by reusing the per-voxel dot product results). We conduct experiments using an actual baseline HBM-PIM device. Our NeRF-PIM demonstrates a speedup of 7.4 and <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$5.0\times $ </tex-math></inline-formula> compared to the baseline on the two datasets, Synthetic-NeRF and Tanks and Temples, respectively.

IEEE Transactions on Computer-Aided Design of Integrated Circuits and SystemsVol. 43(11)
Seoul National University (KR)
Openalex Percentile: Top 46%
Advanced MEMS and NEMS Technologies
0.21
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NeRF-PIM: PIM Hardware-Software Co-Design of Neural Rendering Networks — Sungjoo Yoo, J.K. Heo · IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (2024) | TGRS Research Map | TGRS