Reconfigurable Electro-Optic FET Based on Ferroelectric Electrostatic Doping toward Optical Field Programmable Gate Arrays

Silicon photonic integrated circuits have been extremely well developed and have gradually moved toward large-scale production. However, the limitations of current scaling have forced researchers to explore new avenues to achieve more compact integration and to develop more cost-effective silicon photonics components. Silicon photonic FPGAs are more area-efficient and flexible compared to traditional on-chip optical circuits due to their reconfigurable nature, which allows for the optimization of silicon photonic devices after fabrication. This feature enables a wide range of applications and performance requirements to be met with a single chip design, thereby reducing costs and enabling the rapid prototyping of new photonic circuits. Here, leveraging ferroelectric-doped graphene into a silicon field programmable gate array, we propose a compact reconfigurable electro-optical device with superior nonvolatility and reconfigurability, broadening the range of applications for programmable silicon photonics. Nonvolatile multilevel memory with electrical write and optical readout is implemented. This innovative memory system supports 10 distinct levels of electro-optical storage, providing enhanced capacity and flexibility. Carrier-enhanced and -depleted modes can be reconfigured by electrical programming on the same optical logic gate. Reconfigurable logic computing in the electronic and optical domain that takes advantage of this feature is demonstrated. Our work provides a compact new approach for programmable electro-optic field programmable gate arrays with low power consumption.