An Automated Hardware Design Framework for Various DNNs Based on ChatGPT

In recent years, deep neural networks such as CNN, GAN, and Transformer play a crucial role in diverse domains for their astonishing performance. However, distinct memory accesses and complex computing modes of these networks bring great difficulties to their hardware deployment on resource-constrained hardware devices. Manually designing a dedicated accelerator for a certain network will cause additional labor cost and time overhead. These accelerators may lack universality and flexibility, which cannot be oriented to complex multi-task application scenarios. Therefore, it is vital to develop an automated framework with a flexible hardware architecture for various networks. In this paper, we propose a unified algorithm, which can convert different calculation processes into common operation according to their similar inherent properties. Based on this algorithm, an efficient and flexible accelerator architecture is proposed that can support different neural network computing operations. In addition, to agilely deploy and implement our accelerator, we propose a framework for automatically generating RTL code utilizing the exceptional text generation capability of ChatGPT. We test our framework on an FPGA board and experimental results show that the framework can agilely generate various computing cores according to different configurations. The proposed hardware accelerator supports more neural network operations than other similar accelerators with satisfying hardware efficiency.