Digital Twin Based Run Time Power Management for Edge SoC using Performance Aware Reinforcement Learning
Performance-aware run-time power management poses severe challenges in energy-constrained time-critical systems with their migration to Edge SoC architectures. Primitive runtime power managers are not aware of the performance requirement of the underlying application. Reinforcement learning (RL) based algorithms can bring in the dimension of application performance awareness. However, the issue comes with adaptability to new applications. RL-based algorithms require retraining to adapt to new application scenarios but retraining results in critical deadline misses which cannot be afforded for time-critical systems. This motivated us to propose a digital twin assisted RL-based performance-aware run time power manager. Proposed architecture offloads the training process when new applications arise to the digital twin resulting in zero performance degradation on edge, unlike the state-of-the-art architectures where performance loss is inevitable in fresh circumstances. Application performance-aware training helps in optimal frequency decision making resulting in reduced energy consumption compared to the existing methods. Subsequently, the proposed methodology is implemented on the edge device Nvidia Jetson Nano board with Mi Benchmarks and Poly Benchmarks used for testing. It reduces the energy consumption by $14.38 \%$ compared to OS_Performance mode, 14.85 % compared to OS_Schedutil mode, 6.675 % compared to OS_Ondemand mode and retraining episodes on edge are completely eliminated compared to state-of-the-art Q-learning.
Authors
- Parveen Nisha
- Toshihisa Haraki
- Adnan Aijaz (ORCID: https://orcid.org/0000-0003-1048-0469)
- Pradip Sasmal (ORCID: https://orcid.org/0000-0003-0111-2509)
- Amit Acharyya (ORCID: https://orcid.org/0000-0002-5636-0676)
- Ratnala Vinay
- Chirag Juyal
- Kartik Laad
- Bhavya Pisipati
- Tanimoto Yuki
Institutions
- Suzuki (Japan) (JP)
- Indian Institute of Technology Jodhpur (IN)
- Indian Institute of Technology Hyderabad (IN)
- Vellore Institute of Technology University (IN)
- National Institute of Technology Srinagar (IN)
Publication Details
- Published
- 2024-09-16
- DOI
- https://doi.org/10.1109/socc62300.2024.10737819
- Primary Topic
- 3D IC and TSV technologies
- Type
- article
- Field-Weighted Citation Impact
- 0.00