A Low-voltage-Driven Single-ended Column based SRAM for Low-Power Micro-display
Micro-displays are commonly used in AR/VR applications, wearable devices, and consumer electronics. Since these devices are generally battery-operated, lowering the power consumption in micro-displays, which is the most power-hungry block, is critical. One of the major power consuming sources in the micro-display backplane is the column driver. In this article, we propose a single-ended column based 7T SRAM based pixel circuit for low-power digital displays. The proposed SRAM allows the column driver voltage to be lowered without affecting the write operation. To verify the effectiveness of the design we simulated $480 \times 640$, $720 \times 1280$, and, $1080 \times 1920$ displays in TSMC 65 nm technology with refresh rates of $60 \mathrm{~Hz}, 120 \mathrm{~Hz}$, and 144 Hz. It was observed that for a VGA micro-display with a $480 \times 640$ pixel array and a 60 Hz refresh rate, the proposed design saves $\mathbf{5 1 . 8 \%}$ and $\mathbf{2 6 . 9 \%}$ power compared to a conventional display and a state-of-the-art display, respectively. Moreover, the power saving improves further with an increase in the refresh rate or display panel size.
Authors
- Sheida Gohardehi (ORCID: https://orcid.org/0000-0002-8589-7341)
- Manoj Sachdev (ORCID: https://orcid.org/0000-0002-8256-9828)
- Shubham Ranjan (ORCID: https://orcid.org/0000-0002-8623-6895)
Institutions
- University of Waterloo (CA)
Publication Details
- Published
- 2024-09-16
- DOI
- https://doi.org/10.1109/socc62300.2024.10737758
- Primary Topic
- 3D IC and TSV technologies
- Type
- article
- Field-Weighted Citation Impact
- 0.00