A High-Current-Efficiency Digital-Assisted Analog LDO With Dual-Biasing Mode for Near-Threshold Regulation

A digital-assisted analog low-dropout regulator (DA-ALDO), with low quiescent current and wide-range load current, is proposed. The proposed LDO is mainly constructed by a signal-current-enhancer-based amplifier, together with a digital transient enhancer. A mode controller is proposed to enable an operation with dual-biasing mode. It is designed to detect the magnitude of the supply voltage, classify it into two categories, and decide the biasing mode. With the proposed adaptive bias current and voltage adaptively, the LDO is capable of functioning properly with a board supply domain, from the normal supply voltage of 1.2 V to the near-threshold voltage of 0.5 V. The proposed DA-ALDO is fabricated in a 65-nm CMOS process. The chip area is 0.0134 mm<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> and the total on-chip capacitance is 2.6 pF. The minimum supply and dropout voltage are 0.5 V and 20 mV, respectively. The maximum load current is 940 mA, and the range of quiescent current is 5–<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$44~{\mu }$ </tex-math></inline-formula>A. At 1.2-V supply, the measured undershoot and overshoot at the output are 75 and 77 mV, respectively, when the output current increases from <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${\lt } 26~{\mu }$ </tex-math></inline-formula>A to 940 mA in 400 ns.