Virtualizing Arc Fault and Thermal Test for Virtual Experiments and Digital Twins
This paper explores the use of virtual experiments and digital twins to complement or replace standardised tests. A straightforward methodology is proposed to obtain an equiv-alence between virtual and physical tests. A key step in this method is to virtualize the standard requirements. This analysis is applied to two relevant tests for the electrical industries, the internal arc test and the temperature rise test. All the required test conditions were classified into three groups, those that can be represented in the simulation, those that must be modified to be represented in the virtual environment, and those that are inapplicable in a virtual context. Results for the temperature rise test are presented. The virtual experiment was performed by Monte Carlo simulation with the finite element method.
Authors
- M. Aguirre (ORCID: https://orcid.org/0009-0002-1299-0438)
- Marcos E. Bierzychudek (ORCID: https://orcid.org/0000-0001-7696-9190)
- H. Laiz
Institutions
- National University of General San Martín (AR)
- National Institute of Industrial Technology (AR)
Publication Details
- Published
- 2024-09-18
- DOI
- https://doi.org/10.1109/argencon62399.2024.10735986
- Primary Topic
- Integrated Circuits and Semiconductor Failure Analysis
- Type
- article
- Field-Weighted Citation Impact
- 0.00
Funders
- European Partnership on Metrology