An Efficient FP16-Based Hardware Architecture with Enhanced CORDIC to Implement Sigmoid and Tanh Functions

In the contemporary technological landscape, there has been a marked increase in the demand for Convolutional Neural Network (CNN) inference models to be deployed on edge computing devices. Within this context, the efficient and precise hardware implementations of the fundamental activation functions, such as the hyperbolic tangent (tanh) and the sigmoid function, play a pivotal role in the realization of various neural network algorithms. This work presents a low-power, area-efficient half-precision floating-point (FP16) based implementation for these activation functions, leveraging an enhanced Coordinate Rotation Digital Computer (CORDIC) algorithm. According to the simulations conducted, the proposed architecture demonstrates an average absolute error of 0.0026 for the Sigmoid function and 0.0017 for the Tanh function. Furthermore, the design has been synthesized and floorplanned using the HHGrace 110 nm CMOS technology, resulting in an area of 21,760 μm<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> and a power consumption of 0.8414mW at a frequency of 100MHz. The proposed low-power and area-efficient implementation for these essential activation functions represents a notable step towards the establishment of highly efficient hardware-based CNN accelerators.