Procedural Abstraction on RISC-V Using TP Register

Nowadays electronic devices grows rapidly almost everywhere. The need of embedded chips so keeps rising. Manufactures restrict the resources on a single chip to realize massive production, so reducing the binary size is important for embedded programs. Research before shows that procedural abstraction is an effective method to reduce the binary size of the code in the compiling stage, and there is more potential of this method to discover. In this paper, we investigate several optimizations in compiling, and transfer procedural abstraction into the assembling stage on RISC- V platform. According to the platform feature, we improve the optimization with the free resources(TR register in serial programs). Earlier procedural abstraction don't consider the assembling stage and the platform features. Procedural abstraction in this paper can recognize the same assembly code parts and abstract them into virtual functions. There are three situations found which can use TR register. We evaluate our method on Mibench and Csmith. Compared to GCC -Os option, this method can achieve a reduction of 9.01 % on average. Compare to other optimization, it is very ideal for a single optimization.