Subthreshold Biased Low Noise Amplifier for Low Power Medical Devices

A low power dissipating low noise amplifier for biomedical application is presented in this paper. The LNA is implemented using standard 0.18 μm CMOS technology and to reduce the power consumption of the LNA, all the transistors are made to work in subthreshold region. Inductive source degeneration cascode topology is used for design of the LNA. To achieve optimum performance at low power dissipation, power constraint simultaneous noise and input matching technique is used. The LNA exhibits an input reflection coefficient (S<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">11</inf>) of -15.4 dB, and output reflection coefficient (S<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">22</inf>) of -15.7 dB. It achieves a noise figure (NF) of 2.37 dB, a gain (S<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">21</inf>) of 17.5 dB, a reverse isolation (S<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">12</inf>) of -32.4 dB. The proposed design consumes 570 μW of power from a supply voltage of 1 V and achieves good stability with a stability factor (k<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">f</inf>) of 2.5.

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Published
2024-08-29
DOI
https://doi.org/10.1109/iceect61758.2024.10739172
Primary Topic
Analog and Mixed-Signal Circuit Design
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article

Subthreshold Biased Low Noise Amplifier for Low Power Medical Devices

Debaprasad Das, Mariam Jabali Laskar
Analog and Mixed-Signal Circuit Design
article

Subthreshold Biased Low Noise Amplifier for Low Power Medical Devices

Debaprasad Das, Mariam Jabali Laskar
article en

Abstract

A low power dissipating low noise amplifier for biomedical application is presented in this paper. The LNA is implemented using standard 0.18 μm CMOS technology and to reduce the power consumption of the LNA, all the transistors are made to work in subthreshold region. Inductive source degeneration cascode topology is used for design of the LNA. To achieve optimum performance at low power dissipation, power constraint simultaneous noise and input matching technique is used. The LNA exhibits an input reflection coefficient (S<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">11</inf>) of -15.4 dB, and output reflection coefficient (S<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">22</inf>) of -15.7 dB. It achieves a noise figure (NF) of 2.37 dB, a gain (S<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">21</inf>) of 17.5 dB, a reverse isolation (S<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">12</inf>) of -32.4 dB. The proposed design consumes 570 μW of power from a supply voltage of 1 V and achieves good stability with a stability factor (k<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">f</inf>) of 2.5.

Assam University (IN)
Affordable and clean energy
Openalex Percentile: Top 82%
Analog and Mixed-Signal Circuit Design
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