An Accurate Power Loop Stray Inductance Extraction Method for SiC MOSFETs Based on Forced Resonance With Decoupling Capacitor

To better instruct the optimal operation of silicon carbide <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">mosfet</small>s in converters, accurate estimation of the power loop stray inductance is essential, preventing unacceptable voltage overshoots and EMI noises during switching transients. This letter presents a stray inductance extraction method based on forced low-frequency resonance of the target stray inductance and the dc-link decoupling capacitance, which can be skillfully triggered by applying a switch in the dc bus. An ideal resonant tank can be created by selecting a Class I ceramic capacitor as the stable decoupling capacitor, enabling the precise result to be calculated. The extraction accuracy of this proposed method is verified through experiments, showing a relative error of 2.9% compared with the measurement using a professional impedance analyzer E4990A. Furthermore, unlike existing methods relying on high-frequency resonance with device junction capacitance at the fast-switching ringing stage, this method only requires low bandwidth test equipment, making it attractive for applications limited by costly measuring probes.