An F-Band Two-Stage Buffer Amplifier Gain-Boosted by Lossy RC-Over-Neutralization with a 16.1 GHz Bandwidth in 22nm FDSOI CMOS

This paper presents a two-stage millimeter-wave amplifier designed in the 22 nm FDSOI CMOS technology. The low gain of the transistors at frequencies close to f<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">max</inf>/2 necessitates the use of special circuit design techniques to enhance gain per amplifier stage. In this work, we employ the lossy capacitive neutralization technique to increase the maximum available gain, as well as the unilateralized power gain of a two-port. This is an alternative gain-boosting approach to the well-known lossless embedding. A design-approach by lossy capacitive neutralization is presented. To ensure a long lifetime of the circuit and better yield, a reduced supply voltage of 0.6 V is used. The fabricated chip reaches in measurement a saturated output power of -3.8 dBm and offers a gain of 5.2 dB. The circuit consumes 16.2 mW of power and active area of 380 × 255 µm.

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Published
2024-09-23
DOI
https://doi.org/10.23919/eumic61603.2024.10732616
Primary Topic
Radio Frequency Integrated Circuit Design
Type
article
Field-Weighted Citation Impact
0.00

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article

An F-Band Two-Stage Buffer Amplifier Gain-Boosted by Lossy RC-Over-Neutralization with a 16.1 GHz Bandwidth in 22nm FDSOI CMOS

Quang Huy Lê, Вадим Іссаков, Thomas Kämpfe, Finn Stapelfeldt et al.
Radio Frequency Integrated Circuit Design
article

An F-Band Two-Stage Buffer Amplifier Gain-Boosted by Lossy RC-Over-Neutralization with a 16.1 GHz Bandwidth in 22nm FDSOI CMOS

Quang Huy Lê, Вадим Іссаков, Thomas Kämpfe, Finn Stapelfeldt, Christian Ziegler
article en

Abstract

This paper presents a two-stage millimeter-wave amplifier designed in the 22 nm FDSOI CMOS technology. The low gain of the transistors at frequencies close to f<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">max</inf>/2 necessitates the use of special circuit design techniques to enhance gain per amplifier stage. In this work, we employ the lossy capacitive neutralization technique to increase the maximum available gain, as well as the unilateralized power gain of a two-port. This is an alternative gain-boosting approach to the well-known lossless embedding. A design-approach by lossy capacitive neutralization is presented. To ensure a long lifetime of the circuit and better yield, a reduced supply voltage of 0.6 V is used. The fabricated chip reaches in measurement a saturated output power of -3.8 dBm and offers a gain of 5.2 dB. The circuit consumes 16.2 mW of power and active area of 380 × 255 µm.

Fraunhofer Institute for Photonic Microsystems (DE), Technische Universität Braunschweig (DE)
Deutsche Forschungsgemeinschaft
Affordable and clean energy
Openalex Percentile: Top 83%
Radio Frequency Integrated Circuit Design
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