Low-Power Dual-Core Inductively Coupled 40 GHz Push-Push VCO in 22nm FDSOI CMOS

We present a 39.6-to-41.8 GHz push-push dual-core cross-coupled voltage-controlled oscillator (VCO) in a 22 nm FDSOI CMOS technology. The two cores are coupled inductively. The passive core coupling device serves multiple purposes: a) as H2 filter to enhance phase noise; b) to provide bias; and c) to extract the second harmonic in a non-invasive way and forward it to the output buffer. The VCO achieves in measurement a low phase noise of −102 dBc/Hz at 1 MHz offset at 39.65 GHz and an output power of − 10 dBm. The VCO including buffers dissipates 24.5 mW from a single 0.75 V supply, while both cores consume only 19.7 mW. Fundamental rejection of better 37 dB is achieved over the entire frequency tuning range (FTR). The chip occupies only 0.3 mm<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> including pads. The circuit achieves a very good FoM of −181 dBc/Hz at 1 MHz offset.

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Publication Details

Published
2024-09-23
DOI
https://doi.org/10.23919/eumic61603.2024.10732114
Citations
1
Primary Topic
Radio Frequency Integrated Circuit Design
Type
article
Field-Weighted Citation Impact
0.21
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article

Low-Power Dual-Core Inductively Coupled 40 GHz Push-Push VCO in 22nm FDSOI CMOS

M. Ichikawa, Hiroki Ishikuro, V. Lasserre, Вадим Іссаков et al.
1 citations
Radio Frequency Integrated Circuit Design
0.21
article

Low-Power Dual-Core Inductively Coupled 40 GHz Push-Push VCO in 22nm FDSOI CMOS

M. Ichikawa, Hiroki Ishikuro, V. Lasserre, Вадим Іссаков, Fabio Padovan, Liubov Bakhchova, Sarah Koop-Brinkmann
article en
1 citations

Abstract

We present a 39.6-to-41.8 GHz push-push dual-core cross-coupled voltage-controlled oscillator (VCO) in a 22 nm FDSOI CMOS technology. The two cores are coupled inductively. The passive core coupling device serves multiple purposes: a) as H2 filter to enhance phase noise; b) to provide bias; and c) to extract the second harmonic in a non-invasive way and forward it to the output buffer. The VCO achieves in measurement a low phase noise of −102 dBc/Hz at 1 MHz offset at 39.65 GHz and an output power of − 10 dBm. The VCO including buffers dissipates 24.5 mW from a single 0.75 V supply, while both cores consume only 19.7 mW. Fundamental rejection of better 37 dB is achieved over the entire frequency tuning range (FTR). The chip occupies only 0.3 mm<sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> including pads. The circuit achieves a very good FoM of −181 dBc/Hz at 1 MHz offset.

Keio University (JP), Infineon Technologies (Austria) (AT), Technische Universität Braunschweig (DE)
Affordable and clean energy
Openalex Percentile: Top 47%
Radio Frequency Integrated Circuit Design
0.21
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