Design and Performance of Slow-wave Microstrip Lines in BiCMOS Technology
In this article, we present an innovative slow-wave line concept based on a recently published idea that we have simplified. This concept relies on the use of microstrip lines, making it highly suitable for the implementation of mixed microstrip and slow-wave circuits. Different configurations of layers in the considered CMOS technology have been investigated for better performance of the proposed slow-wave microstrip line. A slow-wave factor of 1.4 can be achieved, translating to length reduction factor of 40%. The width of the strips, for the same characteristic impedance of 50 Ω, is reduced by approximately a factor of 3, allowing for more aggressive meandering, leading to more compact layouts. The quality factor is about half of a conventional microstrip line having the same characteristic impedance, but remains significant beyond 100 GHz.
Authors
- Leonardo Gomes (ORCID: https://orcid.org/0000-0002-6617-2337)
- Philippe Ferrari (ORCID: https://orcid.org/0000-0002-2803-4830)
- Jinyang Le (ORCID: https://orcid.org/0000-0002-3543-1033)
- Ariana L. C. Serrano (ORCID: https://orcid.org/0000-0002-7623-9910)
- Gustavo P. Rehder (ORCID: https://orcid.org/0000-0002-0340-126X)
- Mohammed Wehbi
- Cédric Durand
Institutions
- Institut polytechnique de Grenoble (FR)
- Centre National de la Recherche Scientifique (FR)
- Universidade de São Paulo (BR)
- Centre Interuniversitaire de MicroElectronique et Nanotechnologies (FR)
- STMicroelectronics (France) (FR)
- Université Grenoble Alpes (FR)
Publication Details
- Published
- 2024-09-23
- DOI
- https://doi.org/10.23919/eumic61603.2024.10732853
- Primary Topic
- Microwave Engineering and Waveguides
- Type
- article
- Field-Weighted Citation Impact
- 0.00