Design and Implementation of DS-CDMA Educational Laboratory Board Using FPGA and High-Level Synthesis

Direct Sequence Code Division Multiple Access (DS-CDMA), is one of the main methods to mitigate multipath fading effects. A comprehensive and deep understanding of this technique is necessary for students learning wireless communication. Because of the flexibility and reconfigurability of Field Programmable Gate Array (FPGA), many FPGA-based CDMA systems have been proposed in the literature, focusing on various aspects of the system. However, the previous implementations focus mainly on system implementation or optimization. This paper focuses on the educational aspect by implementing a lab board with many system parameters that the student can test. Various signals can be inspected and the system performance can be evaluated in different conditions. Unlike previous implementations that mainly used Hardware Description Language (HDL), the proposed implementation uses a different methodology based on High-Level Synthesis (HLS), to make the implementation feasible for a broad audience and increase productivity. The design was realized using an Arty A7 100T FPGA development board utilizing only 30% of the available flip-flops, and 49% of the LUTs.