Can Threshold Memory Switching Memristor be Effectively Utilized for the Hardware Implementation of Brain-Inspired Neuromorphic Systems?

Integration of the threshold-type selector layer with the memristor device (TS-MS) has emerged as a promising candidate for suppressing the undesired sneak path current within crossbar memory structures. However, their potential advantages for neuromorphic computing architecture remain unexplored. In this context, we systematically explore the device-to-crossbar level performance of NbO<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf>-HfO<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</inf>-based TS-MS cell with multi-state resistive switching behavior in a layer neural network for pattern recognition. The NbO<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</inf>-HfO<inf xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">x</inf>-based TS-MS device demonstrates the existence of distinct four-level resistance states during the reset process, which facilitates electronic synapses with a high resistance state modulation within the range of 6.5 KΩ to 25.71 KΩ and an on-off resistance ratio of 12. The crossbar simulation reveals that TS-MS could allow recognition accuracy with around 62% when the noise level increases around 27%. Our findings highlight that TS-MS devices have the potential to offer noise immunity operations, coupled with energy efficiency, which positions them as strong candidates for future hardware implementations of brain-inspired neuromorphic systems.