Analysis of the Bootstrapped GaN Logic Gate Family

In recent years, GaN has emerged as an attractive semiconductor for power applications due to its high switching capability and elevated breakdown voltage. While current processes allow for monolithic integration of various components, the lack of complementary transistors requires the use of alternative digital logic families. This paper derives sizing equations and presents design results for the bootstrapped logic gates family, predicting their characteristics with a maximum error of 24%. The developed circuits demonstrate a significant area advantage over other implementations.