A 0.1-3 GHz Wide Bandwidth Ring VCO Fractional-N PLL with Phase Interpolator in 8 nm FinFET CMOS
This paper proposes a multi-phase ring oscillator based fractional-N phase locked loop (FNPLL) frequency synthesizer using phase interpolator for high-speed serial link. This paper aims to reduce quantization noise by employing subinteger divider, extending PLL bandwidth. Fabricated in 8 nm CMOS process, the proposed FNPLL operates over wide frequency range of 0.1-3 GHz. The proposed FNPLL achieves 1.49 ps rms integrated jitter at 3 GHz output. The proposed FNPLL achieves wide BW up to 2 MHz using a 25 MHz reference clock.
Authors
- Taek-Joon An
- Ook Kim
- Jeong-Mi Park
- Jinku Kang (ORCID: https://orcid.org/0009-0008-1825-7054)
Publication Details
- Journal
- JSTS Journal of Semiconductor Technology and Science
- Published
- 2024-10-31
- DOI
- https://doi.org/10.5573/jsts.2024.24.5.440
- Primary Topic
- Semiconductor Lasers and Optical Devices
- Type
- article
- Field-Weighted Citation Impact
- 0.00