Current Status of Analytical FPGA Placement

This work examines the advancements and challenges in analytical placement algorithms for Field-Programmable Gate Arrays (FPGAs), a pivotal aspect of FPGA design. The review highlights the transition from traditional placement methodologies to analytical methods, which offer enhanced solution quality, efficiency, and flexibility. The paper discusses the importance of considering the complexities inherent to FPGA design, including routability, clock signals, congestion, and heterogeneity. Furthermore, the paper emphasizes the use of advanced computing techniques, such as parallelization and deep learning, in FPGA placement. Despite recent advances, the paper identifies remaining gaps in fully addressing resource heterogeneity, clock feasibility, and scalability challenges, suggesting these as areas for future research.

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Publication Details

Published
2024-09-20
DOI
https://doi.org/10.1109/seeda-cecnsm63478.2024.00015
Primary Topic
VLSI and Analog Circuit Testing
Type
article
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article

Current Status of Analytical FPGA Placement

George Dimitriou, Antonios N. Dadaliaris, George K. Kranas, Michael Dossis et al.
VLSI and Analog Circuit Testing
article

Current Status of Analytical FPGA Placement

George Dimitriou, Antonios N. Dadaliaris, George K. Kranas, Michael Dossis, Kosmas Kariotis
article en

Abstract

This work examines the advancements and challenges in analytical placement algorithms for Field-Programmable Gate Arrays (FPGAs), a pivotal aspect of FPGA design. The review highlights the transition from traditional placement methodologies to analytical methods, which offer enhanced solution quality, efficiency, and flexibility. The paper discusses the importance of considering the complexities inherent to FPGA design, including routability, clock signals, congestion, and heterogeneity. Furthermore, the paper emphasizes the use of advanced computing techniques, such as parallelization and deep learning, in FPGA placement. Despite recent advances, the paper identifies remaining gaps in fully addressing resource heterogeneity, clock feasibility, and scalability challenges, suggesting these as areas for future research.

University of Thessaly (GR), University of Western Macedonia (GR)
Decent work and economic growth
Openalex Percentile: Top 80%
VLSI and Analog Circuit Testing
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