Drain self-blocking ambipolar transistors for complementary circuit applications

The development of complementary metal-oxide-semiconductor field-effect transistor (CMOSFET) based on two-dimensional (2D) materials offers an important opportunity to reduce static power and increase the integration density of integrated circuits. One promising approach to realize these CMOSFETs is to employ ambipolar 2D materials as channel materials with designed device structure to control the carrier transport properties for CMOSFET characteristics. However, these devices always suffer from complex multi-gate electrode structure, and hence face challenges in complicated inter-connection design and excessive voltage source requirement for circuit implementation. Here, we develop a three-terminal CMOSFET using ambipolar 2D material based on the drain electric field-induced carrier injection self-blocking mechanism. The designed drain electrode can effectively suppress carrier injection from the drain to the channel material, while the gate voltage can only regulate carrier injection in the source region. As a result, we can configure the device as either N-field-effect transistors (FET) or P-FET with a high current on/off ratio of over 105 by adjusting the three voltages (gate, source, and drain). Furthermore, we utilize these devices to demonstrate multifunctional wave modulator, low-static-power logic inverter (<5 pW), and combinational logic computing in the form of a compact complementary circuit. Our work would explore an efficient approach for implementing complementary circuits using 2D materials.