Design of Codes for One Insertion and at Most Two Consecutive Deletion Errors

This paper proposes a novel binary code to correct one insertion and at most two consecutive deletion errors simultaneously occurring in a codeword. Our proposed code is intended first to isolate the possible error cases among all the error scenarios, and then correct the errors. Furthermore, we provide detailed descriptions of the code construction and also suggest a decoding strategy for the proposed code. According to the proposed code, <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$5\log _{2} n +O(1)$ </tex-math></inline-formula> redundancy bits are required to correct one insertion and at most two consecutive deletion errors occurring in a codeword. In addition, a decoding procedure of the proposed code is comprehensively presented for all error scenarios including a single insertion error, an insertion and a deletion error, and an insertion and two consecutive deletion errors.

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Publication Details

Journal
IEEE Transactions on Communications
Published
2024-10-28
DOI
https://doi.org/10.1109/tcomm.2024.3487052
Primary Topic
VLSI and Analog Circuit Testing
Type
article
Field-Weighted Citation Impact
0.00

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article

Design of Codes for One Insertion and at Most Two Consecutive Deletion Errors

Thi-Huong Khuat, Sunghwan Kim
IEEE Transactions on Communications
VLSI and Analog Circuit Testing
article

Design of Codes for One Insertion and at Most Two Consecutive Deletion Errors

Thi-Huong Khuat, Sunghwan Kim
article en

Abstract

This paper proposes a novel binary code to correct one insertion and at most two consecutive deletion errors simultaneously occurring in a codeword. Our proposed code is intended first to isolate the possible error cases among all the error scenarios, and then correct the errors. Furthermore, we provide detailed descriptions of the code construction and also suggest a decoding strategy for the proposed code. According to the proposed code, <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$5\log _{2} n +O(1)$ </tex-math></inline-formula> redundancy bits are required to correct one insertion and at most two consecutive deletion errors occurring in a codeword. In addition, a decoding procedure of the proposed code is comprehensively presented for all error scenarios including a single insertion error, an insertion and a deletion error, and an insertion and two consecutive deletion errors.

IEEE Transactions on CommunicationsVol. 73(5)
Kyonggi University (KR), Vietnam Posts and Telecommunications Group (Vietnam) (VN), Posts and Telecommunications Institute of Technology
National Research Foundation of Korea
Openalex Percentile: Top 81%
VLSI and Analog Circuit Testing
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Design of Codes for One Insertion and at Most Two Consecutive Deletion Errors — Thi-Huong Khuat, Sunghwan Kim · IEEE Transactions on Communications (2024) | TGRS Research Map | TGRS