Reconfigurable Frequency Response Masking Multi-MAC Filters for Software Defined Radio Channelization

Mobile technology is currently trending toward supporting multiple communication standards on a single device. This means that some reconfigurable techniques must be the foundation of their design. The two essential requirements of channel filters are minimized complexity and reconfigurability. In this research, a novel extension of Frequency Response Masking (FRM) was investigated by employing Time Division Multiplexing (TDM)-based single Multiply and Accumulate (MAC) architecture using the principle of resource sharing to realize multiple sharp filter responses from a single prototype constant group delay low pass filter. This paper uses a single multiply and add units regardless of the quantity of channels and taps. The suggested reconfigurable filter was synthesized on technology based on 0.18-µm CMOS and put into practice. Further trials were carried out on Virtex-II 2v3000ff1152-4 FPGA device. The outcomes revealed that the suggested channel filter, which was synthesized using FPGA, provides 21.36% of the area curtail and 14.88% of power scaling down on average and put into practice using ASIC provides 5.18% of the area reduction and 9.08% of power scaling down on average.

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Publication Details

Journal
Electronics
Published
2024-10-27
DOI
https://doi.org/10.3390/electronics13214211
Citations
2
Primary Topic
Digital Filter Design and Implementation
Type
article
Field-Weighted Citation Impact
0.70
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article

Reconfigurable Frequency Response Masking Multi-MAC Filters for Software Defined Radio Channelization

Man-Fai Leung, Britto Pari James, Subahar Arivalagan
2 citations
Electronics
Digital Filter Design and Implementation
0.70
article

Reconfigurable Frequency Response Masking Multi-MAC Filters for Software Defined Radio Channelization

Man-Fai Leung, Britto Pari James, Subahar Arivalagan
article en
2 citations

Abstract

Mobile technology is currently trending toward supporting multiple communication standards on a single device. This means that some reconfigurable techniques must be the foundation of their design. The two essential requirements of channel filters are minimized complexity and reconfigurability. In this research, a novel extension of Frequency Response Masking (FRM) was investigated by employing Time Division Multiplexing (TDM)-based single Multiply and Accumulate (MAC) architecture using the principle of resource sharing to realize multiple sharp filter responses from a single prototype constant group delay low pass filter. This paper uses a single multiply and add units regardless of the quantity of channels and taps. The suggested reconfigurable filter was synthesized on technology based on 0.18-µm CMOS and put into practice. Further trials were carried out on Virtex-II 2v3000ff1152-4 FPGA device. The outcomes revealed that the suggested channel filter, which was synthesized using FPGA, provides 21.36% of the area curtail and 14.88% of power scaling down on average and put into practice using ASIC provides 5.18% of the area reduction and 9.08% of power scaling down on average.

ElectronicsVol. 13(21)
Vel Tech Rangarajan Dr. Sagunthala R&D Institute of Science and Technology (IN), Anglia Ruskin University (GB)
Openalex Percentile: Top 30%
Digital Filter Design and Implementation
0.70
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Reconfigurable Frequency Response Masking Multi-MAC Filters for Software Defined Radio Channelization — Man-Fai Leung, Britto Pari James, et al. · Electronics (2024) | TGRS Research Map | TGRS