Design and Implementation of IP Operator Library as Backend of Neural Network on ZYNQ FPGA

FPGA devices, known for their low power consumption, are ideal for large-scale computations. Neural networks, which demand substantial computational power, can benefit from FPGA acceleration, particularly in embedded systems. This paper investigates FPGA's potential to enhance neural network performance on embedded devices through circuit design and rapid hardware deployment. Unlike PCs, embedded systems need specialized tools for efficient research and deployment.