Dynamic Analysis and FPGA Implementation of Fractional-Order Hopfield Networks with Memristive Synapse

Memristors have become important components in artificial synapses due to their ability to emulate the information transmission and memory functions of biological synapses. Unlike their biological counterparts, which adjust synaptic weights, memristor-based artificial synapses operate by altering conductance or resistance, making them useful for enhancing the processing capacity and storage capabilities of neural networks. When integrated into systems like Hopfield neural networks, memristors enable the study of complex dynamic behaviors, such as chaos and multistability. Moreover, fractional calculus is significant for their ability to model memory effects, enabling more accurate simulations of complex systems. Fractional-order Hopfield networks, in particular, exhibit chaotic and multistable behaviors not found in integer-order models. By combining memristors with fractional-order Hopfield neural networks, these systems offer the possibility of investigating different dynamic phenomena in artificial neural networks. This study investigates the dynamical behavior of a fractional-order Hopfield neural network (HNN) incorporating a memristor with a piecewise segment function in one of its synapses, highlighting the impact of fractional-order derivatives and memristive synapses on the stability, robustness, and dynamic complexity of the system. Using a network of four neurons as a case study, it is demonstrated that the memristive fractional-order HNN exhibits multistability, coexisting chaotic attractors, and coexisting limit cycles. Through spectral entropy analysis, the regions in the initial condition space that display varying degrees of complexity are mapped, highlighting those areas where the chaotic series approach a pseudo-random sequence of numbers. Finally, the proposed fractional-order memristive HNN is implemented on a Field-Programmable Gate Array (FPGA), demonstrating the feasibility of real-time hardware realization.