Python-LTSpice Framework for Impact Study of PCB Parasitics on Conducted Emission
This work presents a circuit pre-processing framework for LTSpice to identify main contributors to the common-mode conducted emission spectrum by iterative Python-controlled simulation, applying One-at-a-time sampling. For demonstration, a flyback DC/DC converter and the automotive CISPR25 measurement standard are used. The contribution of PCB parasitic capacitances to the CM emission spectrum is analyzed, as well as capacitive components of flyback transformer, SiC transistor switch and cable harness. The frequency range under consideration is CISPR band B and C from 150 kHz to 300 MHz.
Authors
- S. Muñoz (ORCID: https://orcid.org/0000-0002-4130-5543)
- Herbert Hackl (ORCID: https://orcid.org/0000-0003-4101-1470)
- Bernhard Auinger (ORCID: https://orcid.org/0000-0002-9244-6426)
- Jose Romero Lopera (ORCID: https://orcid.org/0000-0001-7641-104X)
- Patrick D. Gsoels
Institutions
- Silicon Austria Labs (Austria) (AT)
Publication Details
- Published
- 2024-09-30
- DOI
- https://doi.org/10.1109/pemc61721.2024.10726409
- Primary Topic
- Recycling and Waste Management Techniques
- Type
- article
- Field-Weighted Citation Impact
- 0.00
Funders
- Silicon Austria Labs