Robustness Assessment of a High Performance, High Robustness IoT Processor Platform

Electronic systems have to comply to electrical robustness requirements defined for their field of application. A TLP based stress test of varying rise time and pulse width is applied to UBS 3, Display Port and CAN Bus IO Interfaces. For a highly complex processor platform, a highly automated setup was implemented. It allows injection of pulses and the detection of hard and soft fails. Software based error detection, leakage measurements and current consumption were used to identify failure thresholds. The extracted failure threshold and high current IV behavior provide the basis for on-board design optimization for improved robustness following the SEED approach. The main novelty is the creation of a test method that allows to test three different I/Os using a common test principle.