Monolithic Switched-Capacitor DC-DC Converters Using BEOL-Compatible Oxide Power Transistors and Superlattice MIM Capacitors

This work reports the first experimental demonstration of on-chip switched-capacitor (SC) dc-dc voltage converters, where two types of back-end-of-line (BEOL) compatible device components—amorphous oxide semiconductor (AOS) power transistors and high-voltage (HV) superlattice MIM capacitors—were monolithically integrated for 12–6 V conversion with an efficiency of 82.8%. To implement more efficient dual-<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">${V}_{\text {th}}$ </tex-math></inline-formula> circuit design, both enhancement- and depletion-mode AOS power transistors were developed. Oxygen anneal was performed to enhance transistor reliability, achieving up to a <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$6.5\times $ </tex-math></inline-formula> reduction in threshold voltage shift. For the MIM capacitors, with a dielectric stack composed of Hf0.25Zr0.75O2 superlattice laminates and Al2O3 interlayers, the projected lifetime could exceed 10 years at <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$120~^{\circ }$ </tex-math></inline-formula>C and 6 V bias, ensuring long-term reliable operation of the converters. Machine learning (ML)-assisted device modeling and circuit simulation results indicated that 4-interleaved design and 3-D capacitor design could further optimize the converter with the decrease of voltage ripple by ~60% and the increase of power density to >1 W/mm2. The developed on-chip SC dc-dc converters are a competitive option for implementing efficient vertical power delivery networks (PDNs) in heterogeneous 3-D integrated circuits (ICs).