4-Bit Factorization Circuit Composed of Multiplier Units With Superconducting Flux Qubits Toward Quantum Annealing

Prime factorization (<italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">P</i> = <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">M</i> × <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">N</i>) is considered to be a promising application in quantum computations. We perform 4-bit factorization in experiments using a superconducting flux qubit toward quantum annealing (QA). Our proposed method uses a superconducting quantum circuit implementing a multiplier Hamiltonian, which provides combinations of <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">M</i> and <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">N</i> as a factorization solution after QA when the integer <italic xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">P</i> is initially set. The circuit comprises multiple multiplier units (MUs) combined with connection qubits. The key points are a native implementation of the multiplier Hamiltonian to the superconducting quantum circuit and its fabrication using a Nb multilayer process with a Josephson junction dedicated to the qubit. The 4-bit factorization circuit comprises 32 superconducting flux qubits. Our method has superior scalability because the Hamiltonian is implemented with fewer qubits than in conventional methods using a chimera graph architecture. We perform experiments at 10 mK to clarify the validity of interconnections of a MU using qubits. We demonstrate experiments at 4.2 K and simulations for the factorization of integers four, six, and nine.