An Area-Efficient CMOS Cross-Coupled <i>LC</i> -VCO Using Nested Intertwined Tail Inductors

An area-efficient CMOS cross-coupled LC-VCO, operating from 5.74 GHz to 8.02 GHz and featuring a tail noise filter with two tail inductors integrated inside the main inductor, is presented for the first time. The tail noise filter comprised two nested intertwined tail inductors (NITIs) and a tail capacitor bank, effectively suppressing phase noise (PN) while generating negligible magnetic couplings between the main inductor and the NITIs. The proposed architecture enables area-efficient CMOS cross-coupled design, even with the two NITIs, but has no performance degradation, i.e., it eliminates the additional area for the tail noise filter. Implemented in 28-nm CMOS process, it consumed 11 mA current from 0.73 V power supply. The LC-VCO achieved PN of −116.38 dBc/Hz at 1 MHz offset frequency for an output frequency of 5.747 GHz. 37% and 27% reductions in silicon area were achieved, over the conventional LC-VCO and an LC-VCO using intertwined tail inductors (ITIs), respectively, without compromising on performance. The proposed design has the smallest area among state-of-the-art LC-VCOs that include a tail noise filter along with competitive PN and frequency tuning range (FTR).

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Publication Details

Journal
IEEE Transactions on Circuits & Systems II Express Briefs
Published
2024-10-24
DOI
https://doi.org/10.1109/tcsii.2024.3485921
Citations
3
Primary Topic
Advancements in Semiconductor Devices and Circuit Design
Type
article
Field-Weighted Citation Impact
0.63

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article

An Area-Efficient CMOS Cross-Coupled LC -VCO Using Nested Intertwined Tail Inductors

Younghyun Lim, Heein Yoon, Sung-Jin Kim, Hyun Joo Nam et al.
3 citations
IEEE Transactions on Circuits & Systems II Express Briefs
Advancements in Semiconductor Devices and Circuit Design
0.63
article

An Area-Efficient CMOS Cross-Coupled LC -VCO Using Nested Intertwined Tail Inductors

Younghyun Lim, Heein Yoon, Sung-Jin Kim, Hyun Joo Nam, Hyogyoung An
article en
3 citations

Abstract

An area-efficient CMOS cross-coupled LC-VCO, operating from 5.74 GHz to 8.02 GHz and featuring a tail noise filter with two tail inductors integrated inside the main inductor, is presented for the first time. The tail noise filter comprised two nested intertwined tail inductors (NITIs) and a tail capacitor bank, effectively suppressing phase noise (PN) while generating negligible magnetic couplings between the main inductor and the NITIs. The proposed architecture enables area-efficient CMOS cross-coupled design, even with the two NITIs, but has no performance degradation, i.e., it eliminates the additional area for the tail noise filter. Implemented in 28-nm CMOS process, it consumed 11 mA current from 0.73 V power supply. The LC-VCO achieved PN of −116.38 dBc/Hz at 1 MHz offset frequency for an output frequency of 5.747 GHz. 37% and 27% reductions in silicon area were achieved, over the conventional LC-VCO and an LC-VCO using intertwined tail inductors (ITIs), respectively, without compromising on performance. The proposed design has the smallest area among state-of-the-art LC-VCOs that include a tail noise filter along with competitive PN and frequency tuning range (FTR).

IEEE Transactions on Circuits & Systems II Express BriefsVol. 72(1)
Kyung Hee University (KR), Ulsan National Institute of Science and Technology (KR)
Ulsan National Institute of Science and Technology, Ministry of Science and ICT, South Korea, Samsung
Affordable and clean energy
Openalex Percentile: Top 31%
Advancements in Semiconductor Devices and Circuit Design
0.63
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An Area-Efficient CMOS Cross-Coupled <i>LC</i> -VCO Using Nested Intertwined Tail Inductors — Younghyun Lim, Heein Yoon, et al. · IEEE Transactions on Circuits & Systems II Express Briefs (2024) | TGRS Research Map | TGRS