Top-Down Junction Analysis in SiC
Abstract An innovative method of characterizing p/n junctions and finding defects in SiC MOSFETs is discussed. First, a baseline technique is considered, which involves OBIRCH analysis of shorting paths after etching off the surface metal. The resolution, however, is not satisfactory. Top surface EBIC and EBIRCH results are then presented. Single-probe imaging with EBIC on gates with a 25 kV SEM (Scanning Electronic Microscopy) is shown to be able to image sub-surface depletion zones in the sample. Further measurements by EBIRCH isolated the precise spot of the defect.
Authors
- Pietro Paolo Barbarino
- Massimiliano Astuto
- Andreas Rummel (ORCID: https://orcid.org/0000-0002-0645-1641)
- G. Calvagno (ORCID: https://orcid.org/0000-0002-2559-2554)
- R. Ricciari
- Giuseppe Sciuto
- G. Johnson
Institutions
- Carl Zeiss (Germany) (DE)
- STMicroelectronics (Italy) (IT)
Publication Details
- Journal
- Proceedings - International Symposium for Testing and Failure Analysis
- Published
- 2024-10-23
- DOI
- https://doi.org/10.31399/asm.cp.istfa2024p0463
- Primary Topic
- Silicon Carbide Semiconductor Technologies
- Type
- article
- Field-Weighted Citation Impact
- 0.00