Enhanced Dynamic Laser Stimulation Method for Fault Isolation

Abstract Optical Fault Isolation (OFI) techniques have been still very effective method for semiconductor failure analysis such as silicon (Si) debugging and defect localization. Dynamic Laser Stimulation (DLS) is one of the most powerful application not only for marginal failure but also to isolate the potential design weak point at the early phase of product development. However, as circuit density of recent advanced system on chip (SoC) extremely increases with process scaling down, vector depth of products are also dramatically increased. This presents a challenging aspect for failure analysis because it is time consuming and reduces the accuracy of DLS analysis, which relies on test vector looping. As a consequence, it can lead to critical issues, such as missing the opportunity for design revision and slowing down the process improvement for yield enhancement This paper proposes a simple method of how to enhance the speed and accuracy of DLS evaluation for SCAN failure in high-density integrated circuits fabricated using the 3nm gate all around (GAA) process. Experimental results demonstrate that the proposed technique can reduce the time required for DLS analysis of SCAN failure while also increasing its accuracy.

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Publication Details

Journal
Proceedings - International Symposium for Testing and Failure Analysis
Published
2024-10-23
DOI
https://doi.org/10.31399/asm.cp.istfa2024p0039
Primary Topic
Fault Detection and Control Systems
Type
article
Field-Weighted Citation Impact
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article

Enhanced Dynamic Laser Stimulation Method for Fault Isolation

Keonil Kim, Ghil-Geun Oh, Kyeong-Seon Shin
Proceedings - International Symposium for Testing and Failure Analysis
Fault Detection and Control Systems
article

Enhanced Dynamic Laser Stimulation Method for Fault Isolation

Keonil Kim, Ghil-Geun Oh, Kyeong-Seon Shin
article en

Abstract

Abstract Optical Fault Isolation (OFI) techniques have been still very effective method for semiconductor failure analysis such as silicon (Si) debugging and defect localization. Dynamic Laser Stimulation (DLS) is one of the most powerful application not only for marginal failure but also to isolate the potential design weak point at the early phase of product development. However, as circuit density of recent advanced system on chip (SoC) extremely increases with process scaling down, vector depth of products are also dramatically increased. This presents a challenging aspect for failure analysis because it is time consuming and reduces the accuracy of DLS analysis, which relies on test vector looping. As a consequence, it can lead to critical issues, such as missing the opportunity for design revision and slowing down the process improvement for yield enhancement This paper proposes a simple method of how to enhance the speed and accuracy of DLS evaluation for SCAN failure in high-density integrated circuits fabricated using the 3nm gate all around (GAA) process. Experimental results demonstrate that the proposed technique can reduce the time required for DLS analysis of SCAN failure while also increasing its accuracy.

Proceedings - International Symposium for Testing and Failure AnalysisVol. 84918
Samsung (South Korea) (KR)
Openalex Percentile: Top 78%
Fault Detection and Control Systems
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