A Correlative Microscopic Workflow Powered by Artificial Intelligence to Accelerate Failure Analysis of Next-Generation Semiconductor Packages

Abstract Over the past decade, the semiconductor industry has increasingly focused on packaging innovations to improve device performance, power efficiency, and reduce manufacturing cost. The recent heterogeneous integration offers an attractive solution in advanced IC packaging because it enables the integration of diverse functional components, such as logic, memory, power modulator, sensor on a single package platform. However, the adoption of the emerging structures, materials and components in advanced packages has challenged the existing fault isolation and analysis techniques. One of the major challenges is the limited accessibility to defects because fault regions are often located deep within devices. Without high-accuracy positional information of a defect, physical cross-sectioning and FIB polishing may alter or destroy the evidence of root causes. A non-destructive microscopic approach is preferred to map defective sites and surrounding structures. However, this method is limited by spatial resolution, especially for analyzing novel submicron interconnects such as fine pitch microbumps, redistribution layers (RDLs), and hybrid bonds. In this paper, we report an AI powered correlative microscopic workflow, where non-destructive X-ray imaging, FIB polishing and high-resolution SEM analyzing techniques are combined to solve the accessibility problem. Because 3D X-ray imaging may take a larger fraction of the time span over the entire workflow, a deep-learning based reconstruction method was applied to accelerate data acquisition. Several next-generation packages, fan-out wafer-level package (FOWLP) and hybrid bonds with sub 10 µm pitch, were used as the test vehicles to demonstrate the workflow performance and efficiency.

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Publication Details

Journal
Proceedings - International Symposium for Testing and Failure Analysis
Published
2024-10-23
DOI
https://doi.org/10.31399/asm.cp.istfa2024p0312
Citations
1
Primary Topic
Integrated Circuits and Semiconductor Failure Analysis
Type
article
Field-Weighted Citation Impact
0.21
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article

A Correlative Microscopic Workflow Powered by Artificial Intelligence to Accelerate Failure Analysis of Next-Generation Semiconductor Packages

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1 citations
Proceedings - International Symposium for Testing and Failure Analysis
Integrated Circuits and Semiconductor Failure Analysis
0.21
article

A Correlative Microscopic Workflow Powered by Artificial Intelligence to Accelerate Failure Analysis of Next-Generation Semiconductor Packages

Cheng‐Hsin Liu, N. Liu, Allen Gu, Chen-Chao Wang, Yu-Jen Chang, Yi‐Sheng Lin, Bessy Chiu
article en
1 citations

Abstract

Abstract Over the past decade, the semiconductor industry has increasingly focused on packaging innovations to improve device performance, power efficiency, and reduce manufacturing cost. The recent heterogeneous integration offers an attractive solution in advanced IC packaging because it enables the integration of diverse functional components, such as logic, memory, power modulator, sensor on a single package platform. However, the adoption of the emerging structures, materials and components in advanced packages has challenged the existing fault isolation and analysis techniques. One of the major challenges is the limited accessibility to defects because fault regions are often located deep within devices. Without high-accuracy positional information of a defect, physical cross-sectioning and FIB polishing may alter or destroy the evidence of root causes. A non-destructive microscopic approach is preferred to map defective sites and surrounding structures. However, this method is limited by spatial resolution, especially for analyzing novel submicron interconnects such as fine pitch microbumps, redistribution layers (RDLs), and hybrid bonds. In this paper, we report an AI powered correlative microscopic workflow, where non-destructive X-ray imaging, FIB polishing and high-resolution SEM analyzing techniques are combined to solve the accessibility problem. Because 3D X-ray imaging may take a larger fraction of the time span over the entire workflow, a deep-learning based reconstruction method was applied to accelerate data acquisition. Several next-generation packages, fan-out wafer-level package (FOWLP) and hybrid bonds with sub 10 µm pitch, were used as the test vehicles to demonstrate the workflow performance and efficiency.

Proceedings - International Symposium for Testing and Failure AnalysisVol. 84918
Advanced Semiconductor Engineering (Taiwan) (TW), Carl Zeiss (United States) (US)
Openalex Percentile: Top 47%
Integrated Circuits and Semiconductor Failure Analysis
0.21
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