Application of Thermal Emission Phase Lock-In Image Statistics to Locate Defects in Z-depth for Advance 2.5D Packaging

Abstract This paper presents a novel method for determining the Z-depth location of short circuit defects in flip chip packages using lock-in thermography (LIT). The approach analyzes phase shift values from localized hot spots using the LIT system's "Image Statistics" feature, specifically focusing on phase "mean" values at specific lock-in frequencies. Through extensive testing on 2.5D stacked silicon interconnect technology (SSIT) packages exhibiting short failures, we established a strong correlation between phase mean values and the vertical location of defects. This technique's reliability was validated through both physical analysis and non-destructive verification methods, demonstrating its effectiveness as a precise diagnostic tool for complex semiconductor packages.