Wafer Level Monitoring of Optical Insertion Loss during Silicon Photonics Manufacturing

Abstract Silicon photonics has emerged as a key solution for on-chip communication to improve computational systems especially for AI workloads. Testing of such photonic integrated circuits (PICs) is key to deliver known good dies to be co-packaged with the compute IC. The recent availability of commercial photonic testers has allowed for monitoring most optical components at wafer level using vertical grating couplers. However, the measurement of optical insertion loss prior to fiber attach of edge-coupled spot size converters remains one of the significant challenges. In this article we demonstrate the use of a novel system for wafer–level optical edge-coupling insertion loss measurement. This method proved to be effective in capturing manufacturing process issues impacting insertion loss with a relatively fast turnaround time compared to fiber attach.