AACIM: A 2785-TOPS/W, 161-TOP/mm², <1.17%-RMSE, Analog-In Analog-Out Computing-In-Memory Macro in 28nm

This paper presents an analog-in analog-out compute-in-memory macro (AACIM) for the use of emerging analog-datapath and digital-control deep neural network processors. Using the custom feedback circuits, it can buffer a 4b 64-by-32 weight matrix in a capacitor-based memory accurately across process variations and device mismatches. It can also perform a vector matrix multiplication of the same dimension at high accuracy using the custom gain boosting circuits. The $28-\mathrm{nm}$ test chip measurements show that the macro achieves an energy efficiency of 2785 TOPS/W, a compute density of 160.9 TOPS/mm2, and RMSE of $\lt \mathbf{1. 1 7 \%}$ across $\mathbf{- 2 0}$ to 70oC and $\pm 10 \%$ supply voltage variations for 4b operations.