A 94.7-dB Dynamic Range Fully Passive Switched-Capacitor Low-pass Filter with Enhanced Selectivity and Passive Gain

This paper introduces a low-noise area efficient fully passive switched-capacitor (SC) filter. For the first time, passive gain is incorporated in a SC charge rotation (CRSC) filter. Additionally, a passive feedback network is introduced that offers a sharp transition between the passband and stopband. Fabricated in 1 P6M $0.18 \mu \mathrm{~m}$ CMOS technology, the proposed filter operates at 1.8 V with a measured power dissipation of 1.52 mW. Using a 250 MHz clock allows tuning the filter’s cutoff frequency, $f_{3 \mathrm{~dB}}$, from 428 kHz to 6.75 MHz while maintaining a fixed DC gain of 1.33 dB. At $f_{3 \mathrm{~dB}}=\mathbf{2. 3 5 M H z}$, the measured in-band IIP3/IIP2 are $25 / 56 \mathrm{dBm}$ while their out-of-band values are 22.4/71.4 dBm, respectively. Input-referred integrated noise over 110 kHz to 2.35 MHz is $8.58 \mu \mathrm{~V}_{\text {rms }}$, resulting in a $94.7 \mathrm{~dB} 1 \% \mathrm{HD} 3$ dynamic range.

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Published
2024-09-09
DOI
https://doi.org/10.1109/esserc62670.2024.10719589
Citations
1
Primary Topic
Analog and Mixed-Signal Circuit Design
Type
article
Field-Weighted Citation Impact
0.18
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article

A 94.7-dB Dynamic Range Fully Passive Switched-Capacitor Low-pass Filter with Enhanced Selectivity and Passive Gain

Farzan Rezaei, Loai G. Salem
1 citations
Analog and Mixed-Signal Circuit Design
0.18
article

A 94.7-dB Dynamic Range Fully Passive Switched-Capacitor Low-pass Filter with Enhanced Selectivity and Passive Gain

Farzan Rezaei, Loai G. Salem
article en
1 citations

Abstract

This paper introduces a low-noise area efficient fully passive switched-capacitor (SC) filter. For the first time, passive gain is incorporated in a SC charge rotation (CRSC) filter. Additionally, a passive feedback network is introduced that offers a sharp transition between the passband and stopband. Fabricated in 1 P6M $0.18 \mu \mathrm{~m}$ CMOS technology, the proposed filter operates at 1.8 V with a measured power dissipation of 1.52 mW. Using a 250 MHz clock allows tuning the filter’s cutoff frequency, $f_{3 \mathrm{~dB}}$, from 428 kHz to 6.75 MHz while maintaining a fixed DC gain of 1.33 dB. At $f_{3 \mathrm{~dB}}=\mathbf{2. 3 5 M H z}$, the measured in-band IIP3/IIP2 are $25 / 56 \mathrm{dBm}$ while their out-of-band values are 22.4/71.4 dBm, respectively. Input-referred integrated noise over 110 kHz to 2.35 MHz is $8.58 \mu \mathrm{~V}_{\text {rms }}$, resulting in a $94.7 \mathrm{~dB} 1 \% \mathrm{HD} 3$ dynamic range.

University of California, Santa Barbara (US)
Affordable and clean energy
Openalex Percentile: Top 51%
Analog and Mixed-Signal Circuit Design
0.18
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