On the Output Conductance Dispersion due to Traps and Self-Heating in Large Bulk, FDSOI and FinFET nMOS Devices

We report experimental investigations on the AC small signal output conductance ($g_{D D}$) of large nMOSFETs with bulk, FDSOI, and bulk FinFET architecture. The $g_{D D}$ frequency spectra reveal opposite trends at low and high gate voltage $\mathrm{V}_{\mathrm{GS}}$. Furthermore, an unexpected anomaly is observed at $\mathrm{V}_{\mathrm{GS}}$ close to the value where the sensitivity to temperature of the DC IV transfer characteristics changes sign.Self-heating is scrutinized as a possible unique origin of the $\mathrm{g}_{\mathrm{DD}}$ dispersion. An additional non-negligible role of trap states is put in evidence by numerical simulations taking self-consistently into account electrothermal effects and the possible presence of gate dielectric traps.The results can reduce inaccuracies in determining the thermal resistances from the $g_{D D}$ frequency dispersion data, and support better design of large FETs and circuits for RF applications.

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Published
2024-09-09
DOI
https://doi.org/10.1109/esserc62670.2024.10719502
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1
Primary Topic
Advancements in Semiconductor Devices and Circuit Design
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article
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article

On the Output Conductance Dispersion due to Traps and Self-Heating in Large Bulk, FDSOI and FinFET nMOS Devices

R. Asanovski, L. Selmi, A.J. Scholten, Ralf Pijper et al.
1 citations
Advancements in Semiconductor Devices and Circuit Design
0.21
article

On the Output Conductance Dispersion due to Traps and Self-Heating in Large Bulk, FDSOI and FinFET nMOS Devices

R. Asanovski, L. Selmi, A.J. Scholten, Ralf Pijper, Dinh Thanh Viet, Lisa Tondelli
article en
1 citations

Abstract

We report experimental investigations on the AC small signal output conductance ($g_{D D}$) of large nMOSFETs with bulk, FDSOI, and bulk FinFET architecture. The $g_{D D}$ frequency spectra reveal opposite trends at low and high gate voltage $\mathrm{V}_{\mathrm{GS}}$. Furthermore, an unexpected anomaly is observed at $\mathrm{V}_{\mathrm{GS}}$ close to the value where the sensitivity to temperature of the DC IV transfer characteristics changes sign.Self-heating is scrutinized as a possible unique origin of the $\mathrm{g}_{\mathrm{DD}}$ dispersion. An additional non-negligible role of trap states is put in evidence by numerical simulations taking self-consistently into account electrothermal effects and the possible presence of gate dielectric traps.The results can reduce inaccuracies in determining the thermal resistances from the $g_{D D}$ frequency dispersion data, and support better design of large FETs and circuits for RF applications.

NXP (Netherlands) (NL), University of Modena and Reggio Emilia (IT), Ferrari (Italy) (IT)
Affordable and clean energy
Openalex Percentile: Top 47%
Advancements in Semiconductor Devices and Circuit Design
0.21
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On the Output Conductance Dispersion due to Traps and Self-Heating in Large Bulk, FDSOI and FinFET nMOS Devices — R. Asanovski, L. Selmi, et al. · (2024) | TGRS Research Map | TGRS