Cryogenic L-UTSOI model for 22nm pMOS FD-SOI, including stress effects

In this paper, we explore the effect of mechanical stress on the electrical parameters, for the first time at cryogenic temperatures, using L-UTSOI 102.7 compact model. We update the model to ensure robustness and precision down to cryogenic temperatures and then we benchmark it with industrial 22nm Fully-Depleted Silicon-On-Insulator (FD-SOI) Metal-Oxide-Semiconductor Field-Effect-Transistors (MOSFET) both at 300K and 4.2K. We observe the stress evolution with temperature through the extracted parameters of our model, which acts as a reference for the numerical mechanical simulations. The simulation provides with meaningful insights on device performance.

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Publication Details

Published
2024-09-09
DOI
https://doi.org/10.1109/esserc62670.2024.10719444
Citations
2
Primary Topic
Advancements in Semiconductor Devices and Circuit Design
Type
article
Field-Weighted Citation Impact
0.42
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article

Cryogenic L-UTSOI model for 22nm pMOS FD-SOI, including stress effects

Thomas Bédécarrats, Christian Witt, O. Rozeau, M. Cassé et al.
2 citations
Advancements in Semiconductor Devices and Circuit Design
0.42
article

Cryogenic L-UTSOI model for 22nm pMOS FD-SOI, including stress effects

Thomas Bédécarrats, Christian Witt, O. Rozeau, M. Cassé, Sylvie Jarjayes, Miltiadis Alepidis, Sébastien Martinie
article en
2 citations

Abstract

In this paper, we explore the effect of mechanical stress on the electrical parameters, for the first time at cryogenic temperatures, using L-UTSOI 102.7 compact model. We update the model to ensure robustness and precision down to cryogenic temperatures and then we benchmark it with industrial 22nm Fully-Depleted Silicon-On-Insulator (FD-SOI) Metal-Oxide-Semiconductor Field-Effect-Transistors (MOSFET) both at 300K and 4.2K. We observe the stress evolution with temperature through the extracted parameters of our model, which acts as a reference for the numerical mechanical simulations. The simulation provides with meaningful insights on device performance.

Commissariat à l'Énergie Atomique et aux Énergies Alternatives (FR), GlobalFoundries (Germany) (DE), Laboratoire d'Électronique des Technologies de l'Information (FR), Université Grenoble Alpes (FR)
Openalex Percentile: Top 37%
Advancements in Semiconductor Devices and Circuit Design
0.42
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