A 40 GS/s 8b-DAC SST-TX in 7 nm FinFET CMOS for cryogenic quantum applications with 32kB SRAMbased RF-DDS AWG

An 8b digital-to-analog converter (DAC) based transmitter (TX) in 7 nm CMOS for cryogenic quantum applications is presented. It operates at up to $40 \mathrm{GS} / \mathrm{s}$ using pushpull output stages with polysilicon resistors (peres) and employs an $A / B$ weighting concept within the DAC output stages for area and clock load reduction. A 32 kB static random-access memory (SRAM) is included for direct radio frequency (RF) arbitrary waveform generation (AWG) as well as a sequencer state machine that performs replays with arbitrary sequence length. The DAC is tailored for integrated qubit control signal generation at the 4 K stage of a cryostat, and includes an external trigger to synchronize multiple DAC TXs. We demonstrate the operation of the circuitry, with a total area of $0.1 \mathrm{~mm}^{2}$ and efficiency of 3.2 $\mathrm{pJ} / \mathrm{b}$, down to a temperature of 4 K. The work represents one of the smallest footprint cryogenic controllers with on-chip memory realized to date.

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Publication Details

Published
2024-09-09
DOI
https://doi.org/10.1109/esserc62670.2024.10719419
Citations
2
Primary Topic
Advancements in Semiconductor Devices and Circuit Design
Type
article
Field-Weighted Citation Impact
0.42
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article

A 40 GS/s 8b-DAC SST-TX in 7 nm FinFET CMOS for cryogenic quantum applications with 32kB SRAMbased RF-DDS AWG

Mridula Prathapan, Pier Andrea Francese, Andrea Ruffino, Péter Müller et al.
2 citations
Advancements in Semiconductor Devices and Circuit Design
0.42
article

A 40 GS/s 8b-DAC SST-TX in 7 nm FinFET CMOS for cryogenic quantum applications with 32kB SRAMbased RF-DDS AWG

Mridula Prathapan, Pier Andrea Francese, Andrea Ruffino, Péter Müller, Cezar B. Zota, Maria Vittoria Oropallo, Marcel Kossel, Thomas Morf, David Heim, Matthias Brändli, Paula Sánchez Almagro
article en
2 citations

Abstract

An 8b digital-to-analog converter (DAC) based transmitter (TX) in 7 nm CMOS for cryogenic quantum applications is presented. It operates at up to $40 \mathrm{GS} / \mathrm{s}$ using pushpull output stages with polysilicon resistors (peres) and employs an $A / B$ weighting concept within the DAC output stages for area and clock load reduction. A 32 kB static random-access memory (SRAM) is included for direct radio frequency (RF) arbitrary waveform generation (AWG) as well as a sequencer state machine that performs replays with arbitrary sequence length. The DAC is tailored for integrated qubit control signal generation at the 4 K stage of a cryostat, and includes an external trigger to synchronize multiple DAC TXs. We demonstrate the operation of the circuitry, with a total area of $0.1 \mathrm{~mm}^{2}$ and efficiency of 3.2 $\mathrm{pJ} / \mathrm{b}$, down to a temperature of 4 K. The work represents one of the smallest footprint cryogenic controllers with on-chip memory realized to date.

IBM Research - Zurich (CH)
Affordable and clean energy
Openalex Percentile: Top 37%
Advancements in Semiconductor Devices and Circuit Design
0.42
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