A 273μW 0.34mm<sup>2</sup> Efficient CRYSTALS-KYBER Processor for PQC Towards Edge Computing

Due to the existence of store-now-decrypt-later attack strategies, the world urgently needs alternative postquantum cryptographic (PQC) solutions. The lattice-based PQC algorithm CRYSTALS-KYBER (Kyber) is widely recognized as a standardization for its good performance and security. We propose a compact and efficient Kyber processor architecture for resource-constrained edge computing. Lightweight SHA-3 with half-fold keccak and samplers provide high-quality discrete distribution coefficient generation with energy-saving features. Modular arithmetic elements are configured as variable structures for different types of fast polynomial computations. The proposed architecture is fabricated under 40 nm process, and ASIC results show that the processor occupies $0.34 \mathrm{~mm}^{2}$ and 253 k equivalent gates with minimum 7 KB memory and the lowest power $273 \mu \mathrm{~W}$. Compared to similar works, we reduce the power by $50 \%$, improve the $6.1 \times$ energy optimization, $8 \times$ area and achieve state-of-the-art in energy efficiency.

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Published
2024-09-09
DOI
https://doi.org/10.1109/esserc62670.2024.10719541
Citations
3
Primary Topic
Interconnection Networks and Systems
Type
article
Field-Weighted Citation Impact
1.05
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article

A 273μW 0.34mm2 Efficient CRYSTALS-KYBER Processor for PQC Towards Edge Computing

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3 citations
Interconnection Networks and Systems
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article

A 273μW 0.34mm2 Efficient CRYSTALS-KYBER Processor for PQC Towards Edge Computing

Jiahao Lu, Shuo Yang, Tianze Huang, Chenjun Yang, Xiang Li, Dongsheng Liu, Jiaming Zhang, Aobo Li, Siqi Xiong
article en
3 citations

Abstract

Due to the existence of store-now-decrypt-later attack strategies, the world urgently needs alternative postquantum cryptographic (PQC) solutions. The lattice-based PQC algorithm CRYSTALS-KYBER (Kyber) is widely recognized as a standardization for its good performance and security. We propose a compact and efficient Kyber processor architecture for resource-constrained edge computing. Lightweight SHA-3 with half-fold keccak and samplers provide high-quality discrete distribution coefficient generation with energy-saving features. Modular arithmetic elements are configured as variable structures for different types of fast polynomial computations. The proposed architecture is fabricated under 40 nm process, and ASIC results show that the processor occupies $0.34 \mathrm{~mm}^{2}$ and 253 k equivalent gates with minimum 7 KB memory and the lowest power $273 \mu \mathrm{~W}$. Compared to similar works, we reduce the power by $50 \%$, improve the $6.1 \times$ energy optimization, $8 \times$ area and achieve state-of-the-art in energy efficiency.

Huazhong University of Science and Technology (CN)
Affordable and clean energy
Openalex Percentile: Top 21%
Interconnection Networks and Systems
1.05
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