Compact 2x2 Inverse-Designed Beam Splitter for Integrated Silicon Photonics

This work presents the inverse design and topology optimization of a compact 2x2 beam splitter for 220 nm silicon-on-insulator (SOI) integrated photonics. We were able to achieve a significant reduction in the device footprint to 3.2 µm x 3 µm with a simulated insertion loss of 0.34 dB and power imbalance of 0.1 dB at 1550 nm. The device geometry is mirrored along the horizontal and vertical axis in order to reduce the parameter space and the number of simulations required for the optimization.