Enhanced RF Switch Performance in RFSOI Technology: Achieving 74 fs R<sub>ON</sub>·C<sub>OFF</sub> and 3.3 V RFV<sub>MAX</sub> on Thinned SOI

As 6G connectivity demands to improve up-to-date CMOS Silicon-on-Insulator (SOI) RF Front End Modules (FEMs) performances, lower Ron C Coff values are required for the next generation of switches, while maintaining equal or higher breakdown voltages. In this paper, we demonstrate that reducing SOI thickness is an effective approach for pushing further the capabilities of modern RF switch devices, diminishing parasitic capacitance $C_{\text {OFF }}$ without affecting devices’ power handling. With respect to our technology reference, $R_{O N} \cdot C_{\text {OFF }}$ has been reduced by 14%, achieving Ron $\cdot C_{\text {OFf }} / R F V_{\text {Max }}$ state-of-art values of $74 \mathrm{fs} / 3.3 \mathrm{~V}$. Furthermore, RF breakdown is studied, revealing that the dominant reason that limits power handling in OFF-state conditions is leakage current, ascribed to Gate-Induced Drain Leakage (GIDL), parasitic bipolar triggering, and punch through. In addition, a non-destructive method to estimate $R F V_{\text {Max }}$ value by means of DC measurements is proposed, providing a rapid and reliable in-process-line method for power handling characterization of RF switch devices.

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Published
2024-09-09
DOI
https://doi.org/10.1109/esserc62670.2024.10719593
Citations
1
Primary Topic
Radio Frequency Integrated Circuit Design
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article
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article

Enhanced RF Switch Performance in RFSOI Technology: Achieving 74 fs RON·COFF and 3.3 V RFVMAX on Thinned SOI

Nicolas Guitard, Frédéric Monsieur, Clément Pribat, Luca Lucci et al.
1 citations
Radio Frequency Integrated Circuit Design
0.21
article

Enhanced RF Switch Performance in RFSOI Technology: Achieving 74 fs RON·COFF and 3.3 V RFVMAX on Thinned SOI

Nicolas Guitard, Frédéric Monsieur, Clément Pribat, Luca Lucci, P. Chevalier, T. Fache, M. Grégoire, F. Danneville, Thomas Bordignon, Zdenek Chalupa, B. Duriez, Yannick Roelens, Adrien Estellon, S. Crémer
article en
1 citations

Abstract

As 6G connectivity demands to improve up-to-date CMOS Silicon-on-Insulator (SOI) RF Front End Modules (FEMs) performances, lower Ron C Coff values are required for the next generation of switches, while maintaining equal or higher breakdown voltages. In this paper, we demonstrate that reducing SOI thickness is an effective approach for pushing further the capabilities of modern RF switch devices, diminishing parasitic capacitance $C_{\text {OFF }}$ without affecting devices’ power handling. With respect to our technology reference, $R_{O N} \cdot C_{\text {OFF }}$ has been reduced by 14%, achieving Ron $\cdot C_{\text {OFf }} / R F V_{\text {Max }}$ state-of-art values of $74 \mathrm{fs} / 3.3 \mathrm{~V}$. Furthermore, RF breakdown is studied, revealing that the dominant reason that limits power handling in OFF-state conditions is leakage current, ascribed to Gate-Induced Drain Leakage (GIDL), parasitic bipolar triggering, and punch through. In addition, a non-destructive method to estimate $R F V_{\text {Max }}$ value by means of DC measurements is proposed, providing a rapid and reliable in-process-line method for power handling characterization of RF switch devices.

Centre National de la Recherche Scientifique (FR), Commissariat à l'Énergie Atomique et aux Énergies Alternatives (FR), CEA Grenoble (FR), STMicroelectronics (France) (FR), Institut d'Electronique, de Microélectronique et de Nanotechnologie (FR), Laboratoire d'Électronique des Technologies de l'Information (FR)
Openalex Percentile: Top 47%
Radio Frequency Integrated Circuit Design
0.21
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