A 3.25 GHz Large-Integer Extended GCD Accelerator in 12 nm
Large-integer extended GCD (XGCD) is a critical operation in cryptography applications such as new blockchains and modular inversion. We present the first ASIC for XGCD, which is $23 \times$ faster than state-of-the-art software, $18 \times$ faster than prior hardware simulations, and up to $303 \times$ faster than prior chips for modular inversion. These performance gains come from careful circuit and logic optimizations to avoid long carry propagation and to hide control signal delays. Our chip computes XGCD with 255-bit integer inputs in 87 ns and XGCD with 512-bit integer inputs in 176 ns on average. Our chip can be configured for constant-time execution and computes constanttime 255-bit XGCD in 119 ns and constant-time 512-bit XGCD in 239 ns.
Authors
- Kavya Sreedhar
- Christopher Torng (ORCID: https://orcid.org/0000-0002-2385-619X)
- Gedeon Nyengele (ORCID: https://orcid.org/0000-0002-5028-7252)
- Mark Horowitz (ORCID: https://orcid.org/0000-0003-3245-7542)
Institutions
- University of Southern California (US)
- Stanford University (US)
Publication Details
- Published
- 2024-09-09
- DOI
- https://doi.org/10.1109/esserc62670.2024.10719500
- Primary Topic
- Image Processing Techniques and Applications
- Type
- article
- Field-Weighted Citation Impact
- 0.00