A 0.00175 mm<sup>2</sup>/channel Direct-Digitization Frontend with Automatic EDO/Drift Compensation for Floating Subcortical Neural Probes

This paper presents a recording front end for modular CMOS neural probes featuring on-site direct digitization with high-spatial resolution. The architecture is based on a folded-cascode OTA-C two-step delta-sigma converter featuring 4-channel time-multiplexing. The integrated automatic commonmode adjustment covers a range of 97.7 mV for electrode DC offset and drift compensation. An integrated noise of $7.59 \mu \mathrm{~V}_{\mathrm{rms}}$ is achieved in the full bandwidth from $D C$ to 10 kHz. The total power consumption amounts to $9.2 \mu \mathrm{~W} /$ channel including digital interfacing with a supply voltage of 1.2 V. The front end is implemented in a 180 nm SOI process on an area of $0.00175 \mathrm{~mm}^{2} / \mathrm{ch}$. enabling full integration below the recording electrodes of a 192-channel probe with 5 external pads and a two-column electrode pitch of $35 \mu \mathrm{~m}$.

Authors

Institutions

Publication Details

Published
2024-09-09
DOI
https://doi.org/10.1109/esserc62670.2024.10719430
Citations
3
Primary Topic
Neuroscience and Neural Engineering
Type
article
Field-Weighted Citation Impact
0.80
Controls
|||
ALL TIME
JAN
FEB
MAR
APR
MAY
JUN
JUL
AUG
SEP
OCT
article

A 0.00175 mm2/channel Direct-Digitization Frontend with Automatic EDO/Drift Compensation for Floating Subcortical Neural Probes

Yiannos Manoli, Roman Willaredt, Daniel De Dorigo, Daniel Wendler et al.
3 citations
Neuroscience and Neural Engineering
0.80
article

A 0.00175 mm2/channel Direct-Digitization Frontend with Automatic EDO/Drift Compensation for Floating Subcortical Neural Probes

Yiannos Manoli, Roman Willaredt, Daniel De Dorigo, Daniel Wendler, Christoph Grandauer, Matthias Kuhl
article en
3 citations

Abstract

This paper presents a recording front end for modular CMOS neural probes featuring on-site direct digitization with high-spatial resolution. The architecture is based on a folded-cascode OTA-C two-step delta-sigma converter featuring 4-channel time-multiplexing. The integrated automatic commonmode adjustment covers a range of 97.7 mV for electrode DC offset and drift compensation. An integrated noise of $7.59 \mu \mathrm{~V}_{\mathrm{rms}}$ is achieved in the full bandwidth from $D C$ to 10 kHz. The total power consumption amounts to $9.2 \mu \mathrm{~W} /$ channel including digital interfacing with a supply voltage of 1.2 V. The front end is implemented in a 180 nm SOI process on an area of $0.00175 \mathrm{~mm}^{2} / \mathrm{ch}$. enabling full integration below the recording electrodes of a 192-channel probe with 5 external pads and a two-column electrode pitch of $35 \mu \mathrm{~m}$.

University of Freiburg (DE)
Openalex Percentile: Top 29%
Neuroscience and Neural Engineering
0.80
AI Navigator

Ask Laika to Summarize, Analyze, and Connect papers live on the map.

Summarize Papers & Methodologies

Extract key findings, datasets, and comparative methods across publications.

Benchmark Rankings & Visual Analytics

Rank top research institutions, authors, funders, topics, and journals by Field-Weighted Citation Impact (FWCI) and paper volume with instant charts.

Connect Distant Disciplines

Bridge topological clusters on the map to find hidden collaborative intersections.