A Cryo-CMOS 64-Channel Bias Generator IC for Surface Ion Trap
A high-voltage DC bias generator chip is designed to address the scalability challenges of ion trap systems. The circuit employs a single digital-to-analog converter (DAC) to generate 64 channel outputs using time-division multiplexed driving. The chip, fabricated using 180 nm BCDMOS process, produces 64 DC voltages in a range of -10V to 16V at 4 Kelvin(4K) with an 11.06 bit resolution. The chip is verified with a trap of ${ }^{40} \mathbf{C a}^{+}$ ions, showing successful operations of capturing and shuttling the ions.
Authors
- Keumhyun Kim
- Hyegoo Lee
- Moonjoo Lee (ORCID: https://orcid.org/0000-0002-4054-0963)
- Seung Hyun Song (ORCID: https://orcid.org/0000-0002-6181-4660)
- Sung Bin Park (ORCID: https://orcid.org/0000-0001-8163-3181)
- Jae-Yoon Sim
Institutions
- Pohang University of Science and Technology (KR)
Publication Details
- Published
- 2024-09-09
- DOI
- https://doi.org/10.1109/esserc62670.2024.10719474
- Citations
- 4
- Primary Topic
- Diamond and Carbon-based Materials Research
- Type
- article
- Field-Weighted Citation Impact
- 0.47