Understanding the Time Dependent Write and Read Performance of IGZO-channel FeFETs

We fabricated IGZO-channel back-gated FeFETs, and characterized the memory performance by studying the time dependent program and erase performance on both FeFETs and FeCAPs with IGZO channel. Although the programming operation is limited by ferroelectric Nucleation Limited Switching (NLS), the erasure is found to be strongly dependent on the time and almost independent of voltage. It is then proposed that the erase operation is limited by positive charge generation in IGZO. With a longer erase pulse width, more positive charges are generated through donor ionization, enabling larger negative voltage drop on ferroelectric layer and thus more dipole switching. We also characterized the read-after-write latency, and it is demonstrated that the Memory Window can be obtained without a delay before reading. Our work shows that the erase performance of Oxide-Semiconductor-channel FeFETs needs to be more understood and further improved.